----------------------------------------------------------------------------------
-- Company: 
-- Engineer: 
-- 
-- Create Date:    09:49:02 04/05/2018 
-- Design Name: 
-- Module Name:    PMOD_SF - Behavioral 
-- Project Name: 
-- Target Devices: 
-- Tool versions: 
-- Description: 
--
-- Dependencies: 
--
-- Revision: 
-- Revision 0.01 - File Created
-- Additional Comments: 
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;


entity PMOD_SF is

    Port ( CLK,RESET : in  STD_LOGIC;
           SCK : out  STD_LOGIC;
           MOSI : out  STD_LOGIC;
           SS : out  STD_LOGIC;
			  SW : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
           MISO : in  STD_LOGIC;
			  LED :OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
			  );
end PMOD_SF;

architecture Behavioral of PMOD_SF is

type state_type is (IDLE,RDID,DID,WAITT);
signal pr_state,nx_state:state_type:=IDLE;
signal spi_clk : std_logic:='0';
signal timer : integer range 0 to 256;
signal data_read: std_logic_vector(23 downto 0);
SIGNAL READ_ID :STD_LOGIC_VECTOR(7 DOWNTO 0):=x"9F";
begin

SCK <= spi_clk;

CLOCK_DIVIDER: process (CLK) 
variable counter: integer range 0 to 500:=0;
BEGIN
if (rising_edge(CLK)) then
		if (counter = 50) then
			counter :=0;
			spi_clk <= not spi_clk;
		else
			counter :=counter +1;
		end if;
end if;
END PROCESS;



LED <= data_read(7 DOWNTO 0) WHEN SW = "00" ELSE
		data_read(15 DOWNTO 8) WHEN SW = "01" ELSE
		data_read(23 DOWNTO 16) WHEN SW = "10";
	
process (nx_state)
variable data_counter : integer range 0 to 32:=0;
begin

if (falling_edge(spi_clk)) then
	case nx_state is 
		when IDLE => 
		   data_counter :=0;
			SS <= '1';
			nx_state <= RDID;	
		when RDID => 
		   SS <= '0';
			if( data_counter < 8) then
				MOSI <= READ_ID(7-data_counter);
				data_counter := data_counter+1;
				nx_state <= RDID;	
			else
				data_counter := 0;
				nx_state <= DID;	
			end if;		
		when DID => 	
		   if( data_counter < 24) then
				data_read(data_counter) <= MISO;
				data_counter := data_counter+1;
				nx_state <= DID;	
			else
				data_counter := 0;
				nx_state <= WAITT;	
			end if;		
		when WAITT => 
			SS <= '1';
			nx_state <= IDLE;	
	end case;
END IF;
end process;

end Behavioral;